FPGA Prototyping of a Quantum Accelerator Model

• Type: Hauptseminar Projektstudium
• State: running
• Projects: SysQC
• Supervisor: Ralf Ramsauer
• Student: Lukas Landgraf

This thesis focuses on the hardware realisation of a quantum accelerator model by porting the existing QEMU-based virtual device design onto a Xilinx VCU118 FPGA platform, used in the role of a PCIe extension card. The work includes the implementation, integration, and validation of the device model in hardware, with emphasis on accurate PCIe communication, driver interaction, and system integration. The resulting prototype will serve as a time-accurate emulation platform for exploring quantum-classical co-design, performance evaluation, and the determination of latency effects relevant to quantum advantage.

Context of the project: SysQC